Spintronics-based Computing
This book provides a comprehensive introduction to spintronics-based computing for the next generation of ultra-low power/highly reliable logic. It will cover aspects from device to system-level, including magnetic memory cells, device modeling, hybrid circuit structure, design methodology, CAD tools, and technological integration methods. This book is accessible to a variety of readers and little or no background in magnetism and spin electronics are required to understand its content. The multidisciplinary team of expert authors from circuits, devices, computer architecture, CAD and system design reveal to readers the potential of spintronics nanodevices to reduce power consumption, improve reliability and enable new functionality.Our PS3-RAM results are in excellent agreement with the ones from Monte-Carlo simulations. ... The number of bits per memory block Nbit 1a4 256 and the number of memory blocks Nword 1a4 1M. To repair the operation errors of memory cells, circuit-level technique-ECC (error correction code) is usually applied [30].
| Title | : | Spintronics-based Computing |
| Author | : | Weisheng Zhao, Guillaume Prenat |
| Publisher | : | Springer - 2015-05-11 |
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